Design For Test

Design For Test Engineer Jobs

3 jobs found

8d ago

Senior Software Development Engineer in Test

NJM Insurance Ewing, NJ

Ewing, NJ

8d ago

$109k - $127k/yr Full time Senior Automated Testing Automation

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Job Description

In this hybrid role in Ewing, NJ, you will build and run automated testing capabilities that improve quality and reliability across NJM’s software delivery lifecycle.

Responsibilities

Design, develop, and maintain automated testing frameworks and test scripts for web, mobile, and API applications
Build robust, scalable, reusable automated test code using industry-standard tools and programming languages
Collaborate with software engineers and quality engineers to implement shift-left testing with automation embedded throughout delivery
Participate in code reviews and provide feedback focused on testability, quality, and automation coverage
Execute and analyze automated and manual testing activities including regression, smoke, integration, and performance tests
Integrate automated tests into CI/CD pipelines to enable continuous testing
Monitor test execution results and report quality metrics
Contribute to test data management, environment setup, and improvements to test infrastructure
Support users with training, mentoring, and troubleshooting
Work effectively in Agile development environments

Requirements

7+ years of experience in software delivery, including 5+ years in Quality Engineering and building test automation tools and frameworks
Bachelor’s degree in computer science or equivalent professional experience
Strong foundation in Quality Engineering principles and advanced testing methodologies
Hands-on experience with test automation tools such as Selenium, Playwright, Cypress, TestNG, JUnit, NUnit
Experience testing APIs using tools/frameworks such as Postman and RestAssured (or similar)
Strong experience with software testing and test automation methodologies
Expertise in at least one programming language: Java, .Net, Python, C#, or JavaScript
Experience with version control systems, such as Git
Strong written and verbal communication skills across technical and non-technical audiences

Technology Stack

Selenium, Playwright, Cypress
TestNG, JUnit, NUnit
Postman, RestAssured
Java, .Net, Python, C#, JavaScript
Git

Preferred Qualifications

Experience with performance and load testing tools such as NeoLoad and JMeter
Experience with cloud platforms
Experience with Docker, Kubernetes, or container-based testing
Experience using AI tools and technology to assist with automated tests
Knowledge of BDD frameworks

Compensation

Pay Range: $109,200 - $126,922 per year
Salary is commensurate with experience and credentials

Benefits

401(k) and 401(k) matching
Dental insurance
Health insurance
Vision insurance
Life insurance
Life and Disability coverage
Employee assistance program
Employee discount
Paid time off (generous PTO)
Paid Sick Leave
Paid parental leave
Referral program
Tuition reimbursement

Application Questions

Will you now, or at any time in the future, require sponsorship?
What is your current city and ZIP code, and how many minutes is your typical commute to West Trenton, NJ (08628) during peak hours? Failure to answer this question will result in application rejection.

Work Location

Hybrid remote in Ewing, NJ 08628

NJM is an equal opportunity employer committed to attracting, retaining, and promoting a diverse and inclusive workforce.

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1mo ago

Test Engineer

Schweitzer Engineering Laboratories, Inc. Lewiston, ID

Lewiston, ID

1mo ago Closed

$84k - $170k/yr Full time Electrical Engineering Design For Test Engineering

This position is no longer accepting applications (closed Aug 31, 2026).

Job Description

Schweitzer Engineering Laboratories, Inc. is seeking a Test Engineer to join its electronics test team onsite in Lewiston, Idaho. The role focuses on designing test hardware, test procedures, and test automation to ensure product quality from concept through production. Salary for this role ranges from USD 84,200 to 170,400 per year, and Electronics Test Engineer positions are available at all experience levels in both Pullman, WA and Lewiston, ID.

Responsibilities

Develop test strategies, test plans, and test automation for new and existing products
Collaborate with R&D product design engineers on Design for Test (DFT), ensuring new products are testable and manufacturable from the start
Design, develop, and maintain board-level and functional test systems, including modern flying probe platforms from SPEA, bed-of-nails systems, and internally developed automated test stations
Analyze test data to identify trends, root causes of failures, and opportunities for improvement
Evaluate and implement new test technologies and methods
Continuously identify, measure, and improve processes, driving improvements in test performance and coverage

Requirements

You have a B.S. in Electrical Engineering, Electronics Engineering Technology, or equivalent
You have a solid understanding of analog and digital electronics, and that foundation matters more than prior test engineering experience
You enjoy hands-on work and problem solving
You have experience with (or want to learn) test system development, scripting, and instrumentation design
You communicate clearly and work well on a team
Experience in electronics test development, designing and building production test systems
A track record of leading or mentoring engineers or technicians
Experience with automation, instrumentation, and circuit analysis
Strong analytical, problem-solving, and communication skills

Technologies

SPEA flying probe platforms, bed-of-nails systems, Python, C

Benefits

Employee Stock Ownership Plan (ESOP)
Tuition assistance
STEM education
Engineering development programs

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1mo ago

Principal PCB & Substrate Layout Engineer

Belcan Phoenix, AZ

Phoenix, AZ

1mo ago Closed

$98 - $98/hr Contract Electrical Engineering Senior Design

This position is no longer accepting applications (closed Aug 22, 2026).

Job Description

Belcan is seeking a Principal PCB & Substrate Layout Engineer to provide technical leadership in high-speed interfaces and dense substrate layout for defense and aerospace microelectronics. This onsite Phoenix contract role calls for a Bachelor’s degree in engineering and at least ten years of hands-on PCB and HDI layout experience, with a focus on multi-die packaging and flip-chip implementations. The right candidate will guide complex designs from concept through fabrication, delivering robust PCBs and substrates that meet stringent military and aerospace standards.

Responsibilities

Lead the design, layout, and analysis of intricate electrical and mechanical systems, including high-density interposers, substrates, and multi-layer PCBs, handling power, digital, analog, and RF signals across multiple dies with a primary emphasis on flip-chip configurations.
Perform hands-on work on high-speed, multi-layer packaging and HDI interconnects, including blind and buried vias, BGAs, RF sections, design for test, impedance calculations, crosstalk, differential pairs, stack-ups, vias, EMC, and material studies/selection.
Ensure designs follow supplier design-for-manufacturing rules and align processes with supplier capabilities.
Prepare fabrication drawings that reflect design intent and support seamless transfer to fabrication suppliers.
Support package material characterization with frequency-dependent models, including skin effects, surface finish, roughness, dielectric loss, and dielectric constant.
Collaborate with peers to review artwork and drawings at various stages and participate in final design reviews for fabrication and assembly.
Support multidisciplinary investigations and feasibility studies across engineering disciplines.
Provide technical guidance interfacing with customers, subcontractors, assemblers, fabricators, vendors, operations, quality, supply chain, and supporting organizations.
Tackle complex issues that require in-depth analysis of variable factors and apply systems thinking to evaluate the impact on the overall system.
Contribute across disciplines to help the team achieve goals and deliverables.

Requirements

Bachelor’s Degree in Engineering or equivalent education and experience.
10+ years of PCB and/or High-Density Package Layout design experience using industry-standard tools such as Cadence APD+.
Proficiency with APD+ physical and electrical constraint editor.
Experience with HDI stack-ups, including blind and buried microvias, RF dielectric materials, and trace widths/spacings from approximately 15 μm down to 2 μm or smaller.
Experience with 2.5D devices, interposer or substrate design, flip-chip, surface mount, die stacking, package stacking, and substrate stacking techniques.
Experience using a Cadence schematic/netlist-driven CAD layout process (APD+/Allegro) and supporting tools.
High-end FPGA package or board design experience.
Ability to collaborate with the Mechanical team to develop full 3D models for fit checks and thermal analysis.
Understanding of layout techniques for digital, analog, and RF designs.
Knowledge of electronic packaging techniques.
Experience using a CAM package for manufacturing data validation; familiarity with CAM350 and Blueprint is preferred.
Working knowledge of JEDEC/IPC design, fabrication, and assembly specifications.
Experience creating assembly documentation and fabrication deliverables per company and industry standards.
Must be a US Person.
Ability to work effectively both independently and as part of a team.
Commitment to teamwork, execution, and clear communication as part of the company culture.

Technologies

Cadence APD+ (Allegro)
APD+ physical and electrical constraint editor
CAM 350
Blueprint

Benefits

Health care
Dental
Vision
Life insurance
401(k)
Education assistance
Paid time off including PTO, holidays, and legally required paid leave

You will be a part of

You will join a team focused on the rapid development of affordable, chip-scale, secure, open system architecture devices. This cutting-edge capability supports the Department of Defense need for made-in-USA microelectronics that equip warfighters with state-of-the-art, trusted military-grade products built on leading commercial technologies.

To succeed in this role, you should have the following skills and experience

Bachelor’s Degree in Engineering or equivalent education and experience.
10+ years of PCB and/or High-Density Package Layout design experience using Cadence APD+ or equivalent tools.
Experience with APD+ physical and electrical constraint editor.
HDI stack-ups including blind and buried microvias, RF dielectric materials, and fine trace widths/spacing down to 2 μm or smaller.
Experience with 2.5D devices, interposer/substrate design, flip-chip, die stacking, and related techniques.
Cadence schematic/netlist-driven CAD layout workflow experience.
High-end FPGA packaging or board design experience.
Ability to work with Mechanical teams to create 3D models for fit and thermal checks.
Understanding of digital, analog, and RF layout techniques.
Knowledge of electronic packaging techniques.
Experience using CAM packages for manufacturing data validation; CAM350 and Blueprint familiarity preferred.
Working knowledge of JEDEC/IPC design, fabrication, and assembly specifications.
Experience producing assembly documentation and fabrication deliverables per standards.
Must be a US Person.
Ability to work well both independently and within a team, upholding teamwork, execution, and communication values.

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