Principal Design Engineer CMOS Design Engineer – RF / Mixed-Signal

Northrop Grumman is seeking a Principal Design Engineer to lead CMOS RF and mixed-signal integrated circuit design and verification for space payload applications.

Responsibilities

• Design, simulate, and verify RF / mixed-signal CMOS circuits for space payloads, including LNAs, mixers, PLLs, ADCs, DACs, and bias/reference circuits
• Create transistor-level architectures and implement designs using industry-standard EDA tools (example: Cadence Virtuoso)
• Run and interpret PVT corner, Monte Carlo, and noise analyses
• Support trade studies to achieve targets for performance, area, power, and radiation tolerance
• Collaborate with layout engineers on floorplanning, parasitic optimization, and DRC/LVS closure
• Contribute to top-level integration activities, participate in design reviews, and produce technical documentation
• Support silicon bring-up, lab characterization, and debug, including assistance with test plan definition and data analysis

Requirements

• Bachelor’s degree in Electrical Engineering (or related field) with 5+ years of relevant CMOS design experience; or Master’s degree with 3+ years; or PhD with 0–2 years
• Hands-on transistor-level CMOS RF and/or mixed-signal IC design experience
• Proficiency with SPICE-based simulation and Cadence (or similar analog/RF design tools)
• Strong analog/RF fundamentals including noise, linearity, stability, matching, and layout-dependent effects
• Experience with verification methods such as PVT corner and Monte Carlo analysis
• Strong communication skills and ability to collaborate in cross-functional teams

Technologies

• Cadence Virtuoso
• Cadence
• SPICE
• PVT corner
• Monte Carlo

Benefits

• Health insurance coverage
• Life and disability insurance
• Savings plan
• Company paid holidays
• Paid time off (PTO) for vacation and/or personal business
• Depending on position: eligibility for overtime, shift differential, and a discretionary bonus in addition to base pay
• Annual bonuses designed to reward individual contributions and allow employees to share in company results
• Vice President or Director positions may be eligible for Long Term Incentives

Location and Work Details

• Manhattan Beach, CA (onsite)
• Travel: Yes, 10% of the time
• Relocation assistance: No
• Clearance required for start: No
• Clearance type: None

Preferred Qualifications

• Experience designing ICs for space, radiation-tolerant, or other high-reliability environments
• Background in RF front ends, data converters, PLLs, or clock generation for space payloads
• Experience with lab validation tools including VNAs, spectrum analyzers, oscilloscopes, and probe stations
• Familiarity with digital-analog interfaces and mixed-signal verification flows
• Experience with heterogeneous integration approaches
• Active security clearance

Compensation

• Primary level salary range: $114,000.00 - $171,000.00 (annual)

Application Period

• Estimated 20 days from the job posting date; may be shortened or extended based on business needs and candidate availability

Please be aware this position is contingent upon capturing program award(s) and obtaining and maintaining associated business and/or customer funding.