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Vivado Engineer Jobs

8 jobs found

2d ago

GPU/FPGA Software Engineer

Everwatch Annapolis Junction, MD

Annapolis Junction, MD

2d ago

$60 - $105/hr Full time Data Processing Developer Engineering

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Job Description

Join Everwatch in Annapolis Junction, MD onsite and build end-to-end software that turns vision concepts into production-ready systems. This role combines acceleration pipeline engineering with modern tooling and an agile delivery mindset, helping teams design efficient, effective solutions for high-throughput, low-latency workloads.

What you will do

Develop complete software solutions from initial vision through production in an agile environment
Design and implement high-throughput, low-latency acceleration pipelines using FPGAs or GPUs
Apply current architectural approaches along with open-source frameworks and tools to deliver end-to-end systems to clients
Analyze the target environment to ensure solutions align with current architecture and operating constraints while supporting future enhancements
Identify and implement system improvements as designs evolve
Collaborate across system development efforts to drive progress

What you bring

Experience architecting and implementing high-throughput, low latency acceleration pipelines using FPGAs (RLT/HLS) or GPUs (CUDA/HIP)
Proficiency with C++, Python, and Docker
Strong understanding of GPU microarchitecture, including warp/wavefront scheduling, shared memory utilization, and occupancy optimization
FPGA experience with SystemVerilog, Verilog, or VHDL, plus C/C++ for HLS
Experience with AMD/Xilinx Vivado and Vitis, or Intel Quartus Prime
Experience integrating high-speed IPs, including PCIe Gen 4/5, DDR4/5, HBM, and 100G Ethernet
TS/SCI clearance with a polygraph
Bachelor’s degree and 20+ years of software engineering experience, or 24+ years of software engineering experience in lieu of a degree

Nice to have

Experience with Agentic AI
Experience with Machine Learning
Experience with Kubernetes or Docker Swarm
Experience with Agile

Security and clearance

Selected applicants will be subject to a security investigation and may need to meet eligibility requirements for access to classified information. TS/SCI clearance with polygraph is required.

Salary: USD 60 to 105 per hour.
Location: Annapolis Junction, MD onsite.

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3mo ago

FPGA Engineer

iTechStack Inc. Houston, TX

Houston, TX

3mo ago Closed

$85k - $87k/yr Full time Electrical Engineering Design Design Engineering

This position is no longer accepting applications (closed Aug 25, 2026).

Job Description

The FPGA Engineer will design and verify VHDL based FPGA designs, perform functional and timing verifications, conduct HIL testing, and develop interfaces and memory architectures for iTechStack Inc. in Houston, TX (onsite).

Responsibilities

Develop and verify VHDL-based FPGA designs.
Perform functional, timing, post-synthesis, and post-layout verification.
Conduct Hardware-in-the-Loop (HIL) testing and hardware validation.
Develop communication interfaces and memory architectures.
Support product validation, documentation, and compliance activities.

Requirements

B.E./M.Tech in Electrical, Electronics, or Instrumentation Engineering.
3+ years of FPGA development experience.
Strong expertise in VHDL.
Hands-on experience with Xilinx Vivado, Intel Quartus, Lattice FPGA, or Microchip Libero.
Experience with FPGA verification, HIL testing, and hardware debugging.
Knowledge of DDR3/DDR4, ADC/DAC, JESD204B, LVDS, ECC.
Experience with Modbus, CAN, Ethernet/IP protocols.
Oil & Gas, Industrial Automation, or Embedded Systems experience is preferred.

Technologies

VHDL
Xilinx Vivado
Intel Quartus
Lattice FPGA
Microchip Libero
DDR3
DDR4
JESD204B
LVDS
ECC
Modbus
CAN
Ethernet/IP
HIL

Pay

Salary: USD 85,000 - 87,000 per year

Location

Houston, TX (onsite)

Application Questions

Do you have FPGA verification, HIL testing, and hardware debugging experience
Do you have experience with Xilinx Vivado, Intel Quartus, Lattice FPGA, or Microchip Libero
Do you have Oil and Gas or refinery monitoring systems experience

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3mo ago

Advanced ASIC FPGA Engineer

General Dynamics Mission Systems, Inc Pittsfield, MA

Pittsfield, MA

3mo ago Closed

$129k - $143k/yr Full time Electrical Engineering Asic Circuit Design

This position is no longer accepting applications (closed Aug 23, 2026).

Job Description

General Dynamics Mission Systems is seeking an Advanced ASIC/FPGA Design Engineer to drive digital design efforts, guiding work from VHDL-based FPGA implementations through ASIC conversions. This on-site role in Pittsfield, Massachusetts involves mentoring engineers, coordinating with packaging on FPGA-to-ASIC transitions, and contributing to major defense-focused programs. The position may require up to 10% travel and the ability to obtain a DoD security clearance within 18 months.

Responsibilities

Define, design, verify, and document ASIC and FPGA projects throughout the development lifecycle
Determine architecture and system-level simulation strategies with emphasis on VHDL-based digital design
Specify module interfaces and all aspects of device design and verification
Assess the design flow, including high level design, synthesis, place-and-route, timing, and power considerations
Develop test and simulation plans that establish functional criteria
Verify test results and analyze performance data
Review vendor capabilities, foundry technologies, device libraries, and simulation tools
Participate in improving ASIC/FPGA organizational processes
Support the generation of technical engineering artifacts using appropriate standards, processes, procedures, and tools
Analyze customer design proposals and manuals to determine feasibility of design or application
Select components and equipment based on specifications and reliability
Conduct hardware integration and testing with lab equipment such as oscilloscopes, logic analyzers, and JTAG debuggers
Collaborate with the ASIC packaging team to execute FPGA-to-ASIC conversions
Mentor engineers on FPGA-to-ASIC conversion methodologies and best practices
Contribute to the completion of major programs and projects
Support program execution with awareness of scope, schedule, and cost objectives
Plan and execute project tasks for the activities described above

Requirements

Strong proficiency in VHDL for digital design and simulation
Hands-on experience with Microsemi and/or Xilinx FPGA development
Proficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools
Hardware integration experience with lab tools such as oscilloscopes, logic analyzers, and JTAG debuggers
Ability to mentor others through technical processes
Ability to obtain a DoD Security Clearance within 18 months
Bachelor's degree in Electrical or Computer Engineering, or related field, plus at least 5 years of relevant experience; or Master's degree plus at least 3 years of relevant experience

Technologies

VHDL
Microsemi FPGA
Xilinx FPGA
Vivado
Libero
Mentor
Cadence EDA
Oscilloscopes
Logic analyzers
JTAG debuggers

Location

Pittsfield, Massachusetts (onsite). Up to 10% travel may be required.

Salary

USD 128,854 - 142,947 per year

Note: This estimate represents the typical salary range for this position based on experience and other factors; actual pay may vary.

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3mo ago

FPGA Engineer (New Hire Sign-On Bonus Eligible)

General Dynamics Mission Systems, Inc Bloomington, MN

Bloomington, MN

3mo ago Closed

$129k - $136k/yr Full time Design Design Engineering Design Verification

This position is no longer accepting applications (closed Aug 17, 2026).

Job Description

Responsibilities

Define, design, verify, and document FPGA developments for embedded systems.
Work with Ethernet frame structures and network protocols.
Determine architecture, perform system simulation, and craft detailed design approaches.
Define module interfaces and all aspects of device design and simulation.
Evaluate the process flow including high level design, synthesis, place and route, timing, and power utilization.
Create test and simulation plans that establish functional criteria.
Verify test results and analyze performance.
Review vendor capabilities, foundry technologies, device libraries, and simulation tools as needed.
Contribute to the improvement of FPGA organizational processes.
Support the generation of technical engineering products by applying appropriate standards, processes, procedures, and tools throughout the FPGA development life cycle.
Contribute to the research and analysis of data such as customer design proposal specifications and manuals to determine feasibility of design or application.
Select components and equipment based on specifications and reliability.
Provide leadership or direction to lower level employees when appropriate.
Independently determine approaches to solutions.
Contribute to the completion of major programs and projects.
Plan and execute project tasks associated with the above activities.
New hires eligible for sign-on bonus.

Requirements

Minimum of 3 years of FPGA engineering experience.
Master's degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field.
Proficient in FPGA engineering concepts, principles, and theories.
Proficient in the principles and techniques of FPGA design.
Proficient understanding of FPGA processes.
Proficient in Microsoft Office applications.
Proficient in System Verilog.
Proficient in Vivado.
Proficient in QuestaSim or ModelSim.
Proficient working in a Linux environment.
Proficient in Git.
Preferred experience with Microchip PolarFire FPGAs.
Preferred experience utilizing UVM (Universal Verification Methodology) for FPGA verification.
Preferred Xilinx Versal experience.
Proficient knowledge of other related disciplines.
Keeps abreast of technology trends.
Proficient awareness of business objectives and the engineering role in achieving them.
Proficient written and verbal communication skills.
Ability to think creatively and multi-task effectively.
Strong ability to communicate issues, impacts, and corrective actions.
Proficient at recognizing and clearly reporting information relevant to sound FPGA design.
Proficient at developing and presenting concepts and ideas.
Regular contact with senior levels of internal work groups.
Works under limited direction.
Contacts with project leaders and other professionals within the Engineering department and with project teams across the company; some external customer contact.
Identifies opportunities to apply AI for continuous improvement and innovation.

Technologies

Microsoft Office
System Verilog
Vivado
QuestaSim
ModelSim
Linux
Git
Microchip Polarfire FPGAs
UVM (Universal Verification Methodology)
Xilinx Versal

Clearance Requirements

Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. U.S. citizenship is required.

Salary

USD 128,924 - 136,000 per yearly

Salary Note

This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. Combined Salary Range: USD $128,924.00 - USD $136,000.00 /Yr.

Company Overview

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency.

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3mo ago

Principal Software Engineer

CACI Melbourne, FL

Melbourne, FL

3mo ago Closed

$100k - $220k/yr Full time Senior Design Engineering Digital Signal Processing

This position is no longer accepting applications (closed Aug 9, 2026).

Job Description

CACI is seeking a Principal Software Engineer in Melbourne, Florida, on a onsite basis, to tackle RF design software challenges across DSP algorithms, embedded Linux on Xilinx platforms, and RF/FPGA system integration. The role centers on developing high-performance signal processing software while collaborating closely with RF, FPGA, hardware, and systems engineers to realize robust, end-to-end solutions.

Responsibilities

Design, implement, and optimize DSP algorithms for RF tasks such as modulation and demodulation, filtering, FFTs, channelization, and digital down/up conversion.
Develop and maintain embedded Linux applications using PetaLinux on Xilinx SoC platforms.
Connect embedded software with FPGA logic via AXI, DMA, interrupts, EMIO, and memory-mapped peripherals.
Work with RF front-end components including attenuators, PLLs and frequency synthesizers, programmable gain amplifiers, upconverters and downconverters, and high-speed RF ADC/DAC devices.
Interface and control ADC/DAC JESD information for signal processing.
Implement and debug SPI, I2C, GPIO, and register-level control interfaces.
Support JESD204 (A/B/C) link bring-up in collaboration with FPGA and hardware teams.
Perform system bring-up, debugging, calibration, and performance optimization.
Collaborate with RF, FPGA, hardware, and systems engineers to align architecture and requirements.
Validate designs using RF lab equipment such as spectrum analyzers, signal generators, oscilloscopes, and VNAs.
Document software, algorithms, interfaces, and test procedures.
Write low-level firmware for board-level controls via FPGA and/or microcontroller in VHDL and/or C/C++.

Requirements

Ability to obtain a security clearance.
Bachelor’s degree in an engineering discipline.
10+ years of electronics design experience.
Experience with RF transceivers such as Analog Devices AD936x or AD908x, or similar.
FPGA design experience using Vivado and/or Vitis.
Strong understanding of digital electronics and the ability to follow schematic diagrams.
Familiarity with AXI interconnects, DMA engines, and high-throughput data paths.
Experience with spidev, IIO frameworks, or custom Linux drivers.
Knowledge of GNU toolchains, cross-compilation, and Yocto-based workflows.
Understanding of wireless or SDR systems (LTE, 5G, Wi-Fi, radar, or custom waveforms).

Technologies

PetaLinux, Xilinx SoC platforms
AXI, DMA, JESD204 (A/B/C)
SPI, I2C, GPIO
VHDL, C, C++
Vivado, Vitis
GNU toolchains, cross-compilation, Yocto
RF transceivers (Analog Devices AD936x, AD908x)

Benefits

Healthcare
Wellness
Financial
Retirement
Family support
Continuing education
Time off benefits

Optional Experience

Experience with Cadence tools and schematic design with OrCAD.
Experience writing Interface Control Documents or high-level design documents.
Experience writing automated test code and controlling external test equipment.
Familiarity with PIC microcontrollers.
Knowledge of STM32 ARM microprocessors and software development.
Ability to use test equipment such as oscilloscopes and logic analyzers in debugging device control interfaces.
GUI design experience in C# or C/C++ for PC control and test application development.

What you can expect

A culture of integrity.
An environment of trust.
A focus on continuous growth.

Pay range

USD 99,800 - 219,600 per year

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4mo ago

Principal Engineer - Airborne Hardware

Great River Technology Albuquerque, NM

Albuquerque, NM

4mo ago Closed

$130k - $200k/yr Full time Electrical Engineering Aerospace Arinc 818

This position is no longer accepting applications (closed Jul 20, 2026).

Job Description

The Principal Engineer - Airborne Hardware at Great River Technology leads hardware development for airborne avionics programs, concentrating on ARINC 818, VHDL/FPGA design, and certification support for high performance aerospace systems. This onsite role is based in Albuquerque, NM.

Responsibilities

Serve as the primary technical authority for all aspects of ARINC 818 design, overseeing Fibre Channel implementations, video formats, timing, and link integrity.
Drive architectural definition, detailed design, and implementation of ARINC 818 interfaces for advanced avionics systems.
Create and execute comprehensive test plans and procedures for ARINC 818 compliance, robustness, and performance validation, often using custom test rigs and advanced instrumentation.
Develop and refine simulation methodologies for ARINC 818 links, including model development, signal integrity analysis, and performance prediction in complex environments.
Design, develop, and verify complex VHDL code for high‑performance FPGA devices (eg, Xilinx) used in mission‑critical aerospace applications.
Apply expertise in FPGA architecture, floor planning, timing closure, synthesis, and place‑and‑route optimization to meet demanding aerospace requirements.
Implement DSP algorithms and video processing pipelines within FPGAs.
Develop comprehensive verification environments using VHDL, UVM, and related methodologies to ensure design integrity and functional correctness.
Lead the full lifecycle hardware development for airborne electronic systems, from requirements through integration, verification, and production support.
Conduct in‑depth analyses of power consumption, component stress, worst‑case tolerances, and reliability for critical hardware components.
Collaborate with cross‑functional teams including Systems Engineering, Software Development, and Manufacturing to ensure seamless integration and optimal system performance.
Provide technical guidance and mentorship to junior and mid‑level hardware engineers, fostering technical excellence and continuous improvement.
Demonstrate deep understanding and proven experience with aerospace certification standards.
Contribute to airworthiness documentation generation and review, including hardware design plans, technical requirements, functional and design specifications, qualification test plans and reports.
Ensure designs adhere to industry best practices, internal standards, and regulatory requirements.
Identify, diagnose, and resolve complex hardware issues using advanced diagnostic tools and methodologies.
Stay informed on emerging technologies, industry trends, and research in digital video, high‑speed interfaces, and FPGA technology to drive innovation.
Propose and implement design improvements for existing products, focusing on quality, cost reduction, and obsolescence management.

Requirements

An accredited Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Aerospace Engineering, or a related field.
More than 10 years of progressive hardware design and development experience in the aerospace or defense sectors.
Extensive experience with VHDL for complex FPGA development in aerospace applications.
A proven track record of leading technical projects and mentoring engineering teams.
Strong foundation in digital circuit design, high‑speed digital interfaces, and signal integrity.
Proficiency with electronic design automation tools for schematic capture, simulation (ModelSim/QuestaSim, Vivado Simulator), and FPGA development (Xilinx, Vivado).
Experience using test equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and network analyzers.
Excellent problem solving, analytical, and communication abilities.
Ability to thrive in a dynamic, collaborative, and highly regulated environment.

Technologies

ARINC 818
Fibre Channel
VHDL
FPGA
Xilinx
Vivado
ModelSim
QuestaSim
Vivado Simulator
UVM
Python
Oscilloscopes
Logic analyzers
Spectrum analyzers
Network analyzers

Compensation

Salary range: USD 130,000 to 200,000 per year.

Benefits

401(k)
Dental insurance
Disability insurance
Employee assistance program
Flexible schedule
Flexible spending account
Health insurance
Health savings account
Life insurance
Paid parental leave
Paid time off
Parental leave
Pet insurance
Professional development assistance
Relocation assistance
Tuition reimbursement
Vision insurance

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4mo ago

Principal Engineer - Airborne Hardware

Great River Technology Phoenix, AZ

Phoenix, AZ

4mo ago Closed

$130k - $200k/yr Full time Electrical Engineering Aerospace Arinc 818

This position is no longer accepting applications (closed Jul 20, 2026).

Job Description

Great River Technology is seeking a Principal Engineer - Airborne Hardware to guide the hardware design and integration of airborne avionics. This onsite role in Phoenix centers on ARINC 818 interfaces, VHDL/FPGA development, verification, and certification within regulated aerospace environments. The successful candidate will lead technically, mentor peers, and ensure robust, high-performance hardware for mission-critical systems.

Responsibilities

Serve as the primary technical authority for ARINC 818 design, including Fibre Channel protocols, video formats, timing, and link integrity.
Lead the architectural definition and detailed implementation of ARINC 818 interfaces for advanced avionics systems.
Develop and execute comprehensive test plans for ARINC 818 compliance, robustness, and performance validation, often using custom test rigs and advanced instrumentation.
Pioneer and refine simulation methodologies for ARINC 818 links, including model development, signal integrity analysis, and performance prediction in complex system environments.
Design, develop, and verify complex VHDL code for high-performance FPGAs (eg, Xilinx) used in mission-critical aerospace applications.
Apply expertise in FPGA architecture, floor planning, timing closure, synthesis, and place-and-route optimization to meet demanding aerospace requirements.
Implement digital signal processing and video processing pipelines within FPGAs.
Develop comprehensive verification environments using VHDL, UVM, or other appropriate methodologies to ensure design integrity and functional correctness.
Lead the full lifecycle hardware development for airborne electronic systems, from requirements definition and conceptual design through detailed design, integration, verification, and production support.
Conduct in-depth analysis of power consumption, component stress, worst-case tolerances, and reliability for critical hardware components.
Collaborate across Systems Engineering, Software Development, and Manufacturing to ensure seamless integration and optimum system performance.
Provide technical guidance and mentorship to junior and mid-level hardware engineers, fostering technical excellence and continuous improvement.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Aerospace Engineering, or a related field.
10+ years of progressive hardware design and development experience in the aerospace or defense sector.
Extensive experience with VHDL for complex FPGA development in aerospace applications.
Proven ability to lead technical projects and mentor engineering teams.
Strong understanding of digital circuit design principles, high-speed digital interfaces, and signal integrity.
Proficiency with EDA tools for schematic capture, simulation (ModelSim/QuestaSim, Vivado Simulator), and FPGA development (Xilinx, Vivado).
Experience with test equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and network analyzers.
Excellent problem-solving, analytical, and communication skills, with the ability to operate in a dynamic, highly regulated environment.

Technologies

VHDL
UVM
ModelSim
QuestaSim
Vivado
Xilinx
Vivado Simulator
Python

Benefits

401(k)
Dental insurance
Disability insurance
Employee assistance program
Flexible schedule
Flexible spending account
Health insurance
Health savings account
Life insurance
Paid parental leave
Paid time off
Parental leave
Pet insurance
Professional development assistance
Relocation assistance
Tuition reimbursement
Vision insurance

Location

Phoenix, AZ (onsite)

Compensation

USD 130,000 - 200,000 per year

Company Overview

Great River Technology is a pioneering leader in high-performance digital video and data development tools and services tailored for the aerospace industry. Since 1996, the company has built strategic partnerships with top-tier commercial and military organizations worldwide, including major aircraft manufacturers, defense contractors, and aerospace innovators.

Preferred Qualifications

Experience with other aerospace data bus standards.
Experience with Python or other scripting languages for test automation and data analysis.

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4mo ago

Principal Engineer - Airborne Hardware

Great River Technology Denver, CO

Denver, CO

4mo ago Closed

$130k - $200k/yr Full time Electrical Engineering Senior Aerospace

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