Advanced ASIC FPGA Engineer

General Dynamics Mission Systems is seeking an Advanced ASIC/FPGA Design Engineer to drive digital design efforts, guiding work from VHDL-based FPGA implementations through ASIC conversions. This on-site role in Pittsfield, Massachusetts involves mentoring engineers, coordinating with packaging on FPGA-to-ASIC transitions, and contributing to major defense-focused programs. The position may require up to 10% travel and the ability to obtain a DoD security clearance within 18 months.

Responsibilities

• Define, design, verify, and document ASIC and FPGA projects throughout the development lifecycle
• Determine architecture and system-level simulation strategies with emphasis on VHDL-based digital design
• Specify module interfaces and all aspects of device design and verification
• Assess the design flow, including high level design, synthesis, place-and-route, timing, and power considerations
• Develop test and simulation plans that establish functional criteria
• Verify test results and analyze performance data
• Review vendor capabilities, foundry technologies, device libraries, and simulation tools
• Participate in improving ASIC/FPGA organizational processes
• Support the generation of technical engineering artifacts using appropriate standards, processes, procedures, and tools
• Analyze customer design proposals and manuals to determine feasibility of design or application
• Select components and equipment based on specifications and reliability
• Conduct hardware integration and testing with lab equipment such as oscilloscopes, logic analyzers, and JTAG debuggers
• Collaborate with the ASIC packaging team to execute FPGA-to-ASIC conversions
• Mentor engineers on FPGA-to-ASIC conversion methodologies and best practices
• Contribute to the completion of major programs and projects
• Support program execution with awareness of scope, schedule, and cost objectives
• Plan and execute project tasks for the activities described above

Requirements

• Strong proficiency in VHDL for digital design and simulation
• Hands-on experience with Microsemi and/or Xilinx FPGA development
• Proficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools
• Hardware integration experience with lab tools such as oscilloscopes, logic analyzers, and JTAG debuggers
• Ability to mentor others through technical processes
• Ability to obtain a DoD Security Clearance within 18 months
• Bachelor's degree in Electrical or Computer Engineering, or related field, plus at least 5 years of relevant experience; or Master's degree plus at least 3 years of relevant experience

Technologies

• VHDL
• Microsemi FPGA
• Xilinx FPGA
• Vivado
• Libero
• Mentor
• Cadence EDA
• Oscilloscopes
• Logic analyzers
• JTAG debuggers

Location

Pittsfield, Massachusetts (onsite). Up to 10% travel may be required.

Salary

USD 128,854 - 142,947 per year

Note: This estimate represents the typical salary range for this position based on experience and other factors; actual pay may vary.