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Job Description

Senior FPGA Engineer will design and verify FPGA solutions across major vendors using VHDL, including gigabit serial interfaces, RF and EO DSP, and embedded processing, while collaborating with circuit card designers and systems engineers from requirements through integration and test. This onsite role is based in Tucson, AZ, with a salary range of USD 150,000 - 160,000 per year.

Responsibilities

  • Develop and verify FPGA designs for multiple device families across Xilinx, Altera, and Microsemi platforms.
  • Implement solutions in VHDL for applications such as gigabit serial interfaces, RF and EO DSP, controls, data links, embedded processing, and processor interfaces.
  • Partner with circuit card designers and systems engineers to capture requirements, architect new components, model algorithms, write code, simulate, and perform place and route.
  • Provide end-to-end design verification and support from requirements definition through integration and test.

Requirements

  • Minimum five years of experience, including at least one area from the following: digital design and VHDL coding; Xilinx or Microsemi devices and tool flows.
  • Experience delivering FPGA solutions for system level applications.
  • Hands-on experience with integration and debugging.
  • Desired FPGA design experience in radar processing techniques; image processing for visual and infrared sensors; embedded systems design using ARM, MicroBlaze, or Nios processors; gigabit serial interfaces and multi-gigabit transceivers (MGTs); and constrained random verification in UVM using SystemVerilog verification on emulation platforms such as Veloce.

Technologies

  • VHDL
  • SystemVerilog
  • UVM
  • Veloce
  • ARM
  • MicroBlaze
  • Nios
  • Xilinx
  • Altera
  • Microsemi

Benefits

  • 401(k)
  • Dental insurance
  • Health insurance
  • Paid time off
  • Vision insurance

Qualifications You Must Have

  • At least five years of experience with digital design and VHDL coding, including work with Xilinx or Microsemi devices and associated tool flows.
  • Proven ability to deliver FPGA solutions at the system level.
  • Hands-on experience with integration and debugging.
  • Preferred FPGA design experience in radar processing; image processing for visual or infrared sensors; embedded systems design using ARM, MicroBlaze, or Nios processors; gigabit serial interfaces and multi-gigabit transceivers; and constrained random verification in UVM using SystemVerilog, including use of emulation platforms such as Veloce.

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